One example of a conventional MOS output circuit is described in, for example, the specification of Japanese Patent No. 4030277. According to this MOS output circuit, a change in the gate impedance of an output transistor in a no-signal condition and during signal input can be reduced by a simple configuration. Thus, a low-strain analog MOS amplifier circuit can be obtained without any increase in chip size.
However, because of the action of a circuit which comprises, for example, a MOS transistor and a resistance and which is configured to determine an idle current in the absence of any input signal, the gate impedance of a p-channel output transistor and the gate impedance of an n-channel output transistor cannot be said to be equal to each other. Therefore, even if a drive circuit at a previous stage drives these output transistors by equal currents, the transfer characteristic of this output circuit considerably varies depending on whether a positive input signal or a negative input signal is applied thereto.
That is, the drawback of the conventional circuit is that a drive circuit of a push (p-channel) output transistor and a drive circuit of a pull (n-channel) output transistor have low symmetry, so that the transfer characteristics of these output transistors when driven have low symmetry.